Device Thermal Control for Three Phase Three Level Neutral Point Clamped Inverters

Abstract

Efficiency, lifetime, and reliability are important factors in the selection of a particular power converter to meet today?s industrial needs. There have been many recent advances in power converter topologies and power converter semiconductor devices which have allowed for higher efficiency, smaller converter sizes, and improved output voltage and current characteristics which reduce the stresses on the motors being driven. Multilevel converters have been researched extensively and their benefits over traditional two level converters are well-known. A drawback of multilevel inverters is the potential for unbalanced semiconductor losses and thermal stress at particular operating points. These imbalances lead to decreased overall converter lifetime which is based on the most stressed device.

This work presents two algorithms, one open loop and one closed loop, along with high bandwidth junction temperature estimation to more equally balance the balance the losses for each semiconductor device in a Three-Level Neutral Point Clamped inverter to reduce the overall average device stresses and to increase the overall converter lifetime at particular operating points. These algorithms are simulated and compared with calculated system device stresses to validate the effectiveness of the proposed strategies in increasing the overall converter lifetime.