Now showing items 1-14 of 14

    • Compiler Construction of Idempotent Regions 

      de Kruijf, Marc; Sankaralingam, Karthikeyan; Jha, Somesh (University of Wisconsin-Madison Department of Computer Sciences, 2011)
      Recovery functionality has many applications in computing systems, from speculation recovery in modern microprocessors to fault recovery in high-reliability systems. Modern systems commonly recover using checkpoints. ...
    • Constraint Centric Scheduling Guide 

      Estan, Cristian; Sankaralingam, Karthikeyan; De Carli, Lorenzo; Nowatzki, Tony; Sartin-Tarm, Michael (2013-02-19)
      The advent of architectures with software-exposed resources (Spatial Architectures) has created a demand for universally applicable scheduling techniques. This paper describes our generalized spatial scheduling framework, ...
    • Design and Evaluation of Dynamically Specialized Datapaths with the DySER Architecture 

      Govindaraju, Venkatraman; Ho, Chen-Han; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2010)
      Due to limits in technology scaling, energy efficiency of logic devices is decreasing in successive generations. To provide continued performance improvements without increasing power, regardless of the sequential or ...
    • The Design, Modeling, and Evaluation of the Relax Architectural Framework 

      de Kruijf, Marc; Nomura, Shuou; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2010)
      As transistor technology scales ever further, hardware reliability is becoming harder to manage. The effects of soft errors, variability, wear-out, and yield are intensifying to the point where it becomes difficult to ...
    • A Detailed Analysis of Contemporary ARM and x86 Architectures 

      Sankaralingam, Karthikeyan; Menon, Jaikrishnan; Blem, Emily (2013-02-11)
      RISC vs. CISC wars raged in the 1980s when chip area and processor design complexity were the primary constraints and desktops and servers exclusively dominated the computing landscape. Today, energy and power are the ...
    • Estimating GPU Speedups for Programs Without Writing a Single Line of GPU Code 

      Ardalani, Newsha; Sankaralingam, Karthikeyan; Zhu, Xiaojin (2014-08-15)
      Heterogeneous processing using GPUs is here to stay and today spans mobile devices, laptops, and supercomputers. Although modern software development frameworks like OpenCL and CUDA serve as a high productivity ...
    • Flexible Lookup Modules for Rapid Deployment of New Protocols in High-speed Routers 

      De Carli, Lorenzo; Pan, Yi; Kumar, Amit; Estan, Cristian; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2009)
      New protocols for the data link and network layer are being proposed to address limitations of current protocols in terms of scalability, security, and manageability. High speed routers and switches that would need to ...
    • MapReduce for the Cell B.E. Architecture 

      de Kruijf, Marc; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2007)
      MapReduce is a simple and flexible parallel programming model proposed by Google for large scale data processing in a distributed computing environment [4]. In this paper, we present a design and implementation of ...
    • Mechanisms for Parallelism Specialization for the DySER Architecture 

      Sankaralingam, Karthikeyan; Nowatzki, Tony; Ho, Chen-Han; Govindaraju, Venkatraraman (University of Wisconsin-Madison Department of Computer Sciences, 2012-06-13)
      Specialization is a promising direction for improving processor energy efficiency. With functionality specialization, hardware is designed for application-specific units of computation. With parallelism specialization, ...
    • Memory Access Dataflow 

      Sankaralingam, Karthikeyan; Kim, Sung Jin; Ho, Chen-Han (2014-03-07)
      Specialization and accelerators are an effective way to address the slowdown of Dennard scaling. For a family of accelerators like DySER, NPU, CE, and SSE acceleration that rely on a high performance processor to interface ...
    • OpenSPLySER: The Integrated OpenSPARC and DySER Design 

      Benson, Jesse; Cofell, Ryan; Frericks, Chris; Ho, Chen-Han; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2011)
      The Dynamically Synthesized Execution (DySE) model has been proposed to improve the energy efficiency and performance of general purpose programmable processors. We describe how a DySE Resource (DySER) block can be integrated ...
    • Porting CMP Benchmarks to GPUs 

      Sinclair, Matthew D.; Duwe, Henry; Sankaralingam, Karthikeyan (University of Wisconsin-Madison Department of Computer Sciences, 2011)
      GPUs have become increasingly popular in recent years, in large part due to their potential to offer a large amount of computational power at low prices. They offer massive potential speedups in program performance, but ...
    • Signature Matching in Network Processing Using SIMD/GPU Architectures 

      Goyal, Neelam; Ormont, Justin; Smith, Randy; Sankaralingam, Karthikeyan; Estan, Cristian (University of Wisconsin-Madison Department of Computer Sciences, 2008)
      Deep packet inspection is becoming prevalent for modern network processing systems. They inspect packet payloads for a variety of reasons, including intrusion detection, traffic policing, and load balancing. The focus of ...
    • Studying Hybrid Von-Neumann/Dataflow Execution Models 

      Nowatzki, Tony; Govindaraju, Venkatraman; Sankaralingam, Karthikeyan (2015-07-02)
      Hardware specialization is becoming a promising paradigm for future microprocessors. Unfortunately, by its very nature, the exploration of specialization ideas, (the artifact is dubbed an ?accelerator?) are developed, ...