Now showing items 1-2 of 2

    • Reducing Coherence Overheads with Multi-line Invalidation (MLI) Messages 

      Yoon, Hongil; Sohi, Gurindar (2013-05-31)
      Most multiprocessors employ coherent caches despite the overheads of doing so. As future processors will be multi-processors with elaborate cache hierarchies, the overheads of cache coherence will be an important area for ...
    • Region-level Tracking for Scalable Directory Cache 

      Yoon, Hongil; Sohi, Gurindar S. (2015-04-19)
      Traditional coherence directories track sharing information at a cache-line granularity. In practice, however, as data sharing occurs at a coarser granularity in a large region of memory, common sharing patterns tend to ...