Browsing by Author "Saluja, Kewal"
Now showing items 1-5 of 5
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Design and Analysis of a Gracefully-Degrading Interleaved Memory System
Cheung, Kifung; Sohi, Gurindar S; Saluja, Kewal; Pradhan, Dhiraj (University of Wisconsin-Madison Department of Computer Sciences, 1988) -
Finding the Parasitic Inductances in a VLSI System Utilizing an Efficient Tree-Code Algorithm
Tanumihardjo, Jeremy (2010-05-15)Area and power have become larger motivators recently than in the past in both the general purpose and ASIC environment. With the advent of sub-45 micron technologies, more transistors can be fit into a specified area, ... -
GPGPU WORKLOAD ANALYSIS AND MEDIA PERFORMANCE STUDIES
Simha, Ashwini (2011-05-15)This project was done with the Mobile Microprocessor Group at Intel Corporation as a part of a six month internship. The primay objective of this project was to study the performance of GPGPUs (General purpose computation ... -
Performance/cost analysis of Software Implemented Hardware Fault Tolerance Techniques
Abhyankar, Ameya (2010-05-15)As Moore's law projections continue to hold true, more and more transistors are getting integrated on a single chip. These transistors are being smaller each passing technology generation. Forecasts suggest that the ... -
Sensor Based Real-Time Scheduling in Thermally Constrained Uniprocessor Systems
Ahmed, Rehan (2010-12-15)Due to increasing power densities, thermal management is becoming an important issue in real-time systems. In particular, without thermal-aware scheduling, execution of tasks in a real-time application may increase the ...