Now showing items 1-6 of 6

    • Constructing Neural Branch Prediction with Memristive Device 

      Shi, Guangyu (2011-05-15)
      In superscalar computers, average branch instruction latency is crucial to the overall performance of the computer. Among all the branch predictors that have been proposed, neural branch predictors tend to have a better ...
    • Fast Distributed Mutual Exclusion 

      Franey, Sean (2011-05-15)
      A technique is proposed for quickly distributing mutexes in a system of multiple nodes. Evaluated in the context of a physical network, it is relatively agnostic with respect to the underlying topology and can be modified ...
    • Implementation of Complement Mode Execution 

      MItra, Jatin (2011-08-26)
      As technology goes deeper into the submicron range device aging effects become increasingly powerful. The Colt duty cycle equalizer gives a microarchitectural solution to this problem with execution of complemented data ...
    • Optimizing Hierarchical Algorithms for GPGPUs 

      Nere, Andrew (2010-05-15)
      The performance potential of future architectures, thanks to Moores Law, grows linearly with the number of available devices per integrated circuit. Whether these future devices are ultra-small CMOS transistors, nano-tubes, ...
    • THERMAL MANAGEMENT OF THE HYBRID MEMORY CUBE 

      Khurshid, Mushfique (2013-05-19)
      Main memory performance is becoming an increasingly important factor contributing to overall system performance, especially due to the so-called memory wall. The Hybrid Memory Cube (HMC) is a novel 3D heterogenous ...