Browsing by Author "Sohi, Gurindar Singh"
Now showing items 3-22 of 26
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Design and Analysis of a Gracefully Degrading Interleaved Memory System
Cheung, Kifung C.; Sohi, Gurindar Singh; Saluja, Kewal K.; Pradhan, Dhiraj K. (IEEE COMPUTER SOC, 1990) -
Distributed-Directory Scheme - Scalable Coherent Interface
James, David V.; Laundrie, Anthony T.; Gjessing, Stein; Sohi, Gurindar Singh (IEEE COMPUTER SOC, 1990) -
Dynamic dependency analysis of ordinary programs
Austin, Todd M.; Sohi, Gurindar Singh (1992) -
Dynamic instruction reuse
Sodani, Avinash; Sohi, Gurindar Singh (IEEE, Los Alamitos, CA, USA, 1997) -
Dynamic speculation and synchronization of data dependences
Moshovos, Andreas; Breach, Scott E.; Vijaykumar, Terani N.; Sohi, Gurindar Singh (IEEE, Los Alamitos, CA, USA, 1997) -
An empirical study of the Cray Y-MP processor using the Perfect Club benchmarks
Vajapeyam, Sriram; Sohi, Gurindar Singh; Hsu, Wei-Chung (1991) -
Evaluating design choices for shared bus multiprocessors in a throughput-oriented environment
Chiang, Men-Chow; Sohi, Gurindar Singh (1992) -
The expandable split window paradigm for exploiting fine-grain parallelism
Franklin, Manoj; Sohi, Gurindar Singh (1992) -
High-bandwidth address translation for multiple-issue processors
Austin, Todd M.; Sohi, Gurindar Singh (ACM, 1996) -
High-bandwidth interleaved memories for vector processors - a simulation study
Sohi, Gurindar Singh (1993) -
High-bandwidth interleaved memories for vector processors-a simulation study
Sohi, Gurindar Singh (1993) -
Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers
Sohi, Gurindar Singh (1990) -
Microarchitectural innovations: Boosting microprocessor performance beyond semiconductor technology scaling
Moshovos, Andreas; Sohi, Gurindar Singh (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2001) -
Microarchitecture of superscalar processors
Smith, James E.; Sohi, Gurindar Singh (IEEE, Piscataway, NJ, USA, 1995) -
New Directions in Scalable Shared-Memory Multiprocessor Architectures - Introduction
Thakkar, Shreekant; Dubois, Michel; Laundrie, Anthony T.; Sohi, Gurindar Singh (IEEE COMPUTER SOC, 1990) -
Parallelism in the front-end
Oberoi, Paramjit S.; Sohi, Gurindar Singh (Institute of Electrical and Electronics Engineers Computer Society, 2003) -
Reducing memory latency via read-after-read memory dependence prediction
Moshovos, Andreas; Sohi, Gurindar Singh (IEEE COMPUTER SOC, 2002) -
Request combining in multiprocessors with arbitrary interconnection networks
Lebeck, Alvin R.; Sohi, Gurindar Singh (IEEE, Piscataway, NJ, USA, 1994) -
Speculative incoherent cache protocols
Huh, Jaehyuk; Burger, Doug; Chang, Jichuan; Sohi, Gurindar Singh (IEEE COMPUTER SOC, 2004) -
Speculative multithreaded processors
Sohi, Gurindar Singh; Roth, Amir (IEEE Comput. Soc, 2001)