Browsing by Author "Hsieh, Jian-tu"
Now showing items 1-2 of 2
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Performance Evaluation of a Pipelined VLSI Architecture Using the Graph Model of Behavior (GMB)
Hsieh, Jian-tu; Pleszkun, Andrew R; Vernon, Mary K (University of Wisconsin-Madison Department of Computer Sciences, 1985) -
Performance Evaluation of the PIPE Computer Architecture
Hsieh, Jian-tu; Pleszkun, Andrew R; Goodman, James R (University of Wisconsin-Madison Department of Computer Sciences, 1984)